Arteris Selected by 2V Systems for IO Chiplet for Data Center
CAMPBELL, Calif., Oct. 21, 2025 (GLOBE NEWSWIRE) — Arteris, Inc. (Nasdaq: AIP), a leading provider of system IP for accelerating semiconductor creation in the AI era, today announced that 2V Systems has licensed Arteris’ Ncore 3 cache coherent interconnect IP and Arteris’ FlexNoC 5 non-coherent interconnect IP for its server IO chiplet, to serve as the connectivity hub for multi-die high-performance, cost-effective RISC-V-based SoCs for data centers and cloud infrastructure for AI workloads.
Aglaia Kong, CEO of 2V Systems, said:
The next generation of cutting-edge SoCs for AI and data centers will be built using IO chiplets to effectively scale compute,
“Our multi-die SoCs will use Arteris Ncore IP and FlexNoC IP as the compute data transport across chiplets, meeting the high bandwidth, low latency, and low power needs of data centers and cloud infrastructure.”
The Arteris highly flexible and silicon-proven network-on-chip (NoC) interconnect IPs are ideal for serving as the data highway in the IO chiplet, meeting the energy and performance requirements for AI workloads and interoperability for integration into various multi-die SoCs.
K. Charles Janac, president and CEO of Arteris, said:
2V Systems is deploying Arteris technology to provide central communication across multi-die SoCs via the high-performance IO chiplet for various data center workloads and low latency chiplet compute integration
“Based on our multi-die solution, 2V Systems’ IO chiplet will serve to effectively integrate heterogeneous chiplets into SoCs that address the needs of AI data centers.”
Advanced semiconductor capabilities are vital for the development of future AI solutions and Arteris’ innovative technology plays a pivotal role. The Arteris multi-die solution allows customers to reduce cost and risk, compress development cycles, scale modular architectures, and deliver differentiated AI performance—while staying aligned with evolving industry realities. Learn more at arteris.com/multi-die.
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Arteris Selected by 2V Systems for IO Chiplet for Data Center, source
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